The development of portable equipment, in particular in the field of telecommunications, is leading to the necessity for integrated circuits to be available operating within a wider range of power supply voltages (2.7 volts to 5.5 volts) than for conventional devices (5 volts +/-10%).
The construction of digital CMOS circuits rests on a clock with two anti-overlap systems, such that the variations in the non-overlap values have an influence on the performance of such circuits.